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Self-Adaptive Algorithmic/Architectural Design for Real-Time, Low-Power Video Systems Luca FANUCCI Sergio SAPONARA Massimiliano MELANI Pierangelo TERRENI Publication IEICE TRANSACTIONS on Information and Systems Vol.E88-D No.7 pp.1538-1545 Publication Date: 2005/07/01 Online ISSN: DOI: 10.1093/ietisy/e88-d.7.1538 Print ISSN: 0916-8532 Type of Manuscript: Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1) Category: Adaptive Signal Processing Keyword: adaptive signal processing, low-power, VLSI architectures, image processing and multimedia systems, H.264, Full Text: PDF(529.4KB)>>
Summary: With reference to video motion estimation in the framework of the new H.264/AVC video coding standard, this paper presents algorithmic and architectural solutions for the implementation of context-aware coprocessors in real-time, low-power embedded systems. A low-complexity context-aware controller is added to a conventional Full Search (FS) motion estimation engine. While the FS coprocessor is working, the context-aware controller extracts from the intermediate processing results information related to the input signal statistics in order to automatically configure the coprocessor itself in terms of search area size and number of reference frames; thus unnecessary computations and memory accesses can be avoided. The achieved complexity saving factor ranges from 2.2 to 25 depending on the input signal while keeping unaltered performance in terms of motion estimation accuracy. The increased efficiency is exploited both for (i) processing time reduction in case of software implementation on a programmable platform; (ii) power consumption reduction in case of dedicated hardware implementation in CMOS technology. | ||||||||||
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