Design and Implementation of the High-Speed IPv6-IPv4 Translator and Analysis of Its Performance

In-Yeup KONG
Kyong-Yeol LEE
Jung-Tae LEE

Publication
IEICE TRANSACTIONS on Communications   Vol.E89-B    No.4    pp.1136-1143
Publication Date: 2006/04/01
Online ISSN: 1745-1345
DOI: 10.1093/ietcom/e89-b.4.1136
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Internet Technology VI)
Category: 
Keyword: 
IPv6,  NAPT-PT/SIIT,  translator,  performance evaluation,  

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Summary: 
In this paper, we propose high performance IPv6-IPv4 translator, which translates all packets between IPv6 networks and IPv4 networks at high speed. In our previous work, we analyzed the performance factors of the existing S/W IPv6-IPv4 translators and proposed the improvement methods of each factor. To realize these methods, we also design and implement the IPv6-IPv4 translator with hardware core for the high-speed translation. To verify functionality of our translator core, the hardware emulation using prototyping as well as simulation is performed. Moreover, we show that our translator core can support high-performance translation.