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A 1-V Cyclic A/D Converter Using FD-SOI Sample/Hold Circuits for Sensor Networks
Jun TERADA Yasuyuki MATSUYA Shin'ichiro MUTOH Yuichi KADO
Publication
IEICE TRANSACTIONS on Electronics
Vol.E88-C
No.4
pp.479-483 Publication Date: 2005/04/01 Online ISSN:
DOI: 10.1093/ietele/e88-c.4.479 Print ISSN: 0916-8516 Type of Manuscript: Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP) Category: Analog Keyword: A/D converter, sample hold, FD-SOI, low voltage,
Full Text: PDF(542.7KB)>>
Summary:
A cyclic A/D conversion circuit technique for sensor networks has been developed using 0.2-µm CMOS/FD-SOI technology. The FD-SOI analog switches can lower the supply voltage without degrading accuracy because of their negligible body effect. The proposed A/D converter achieves operation at the supply voltage of 1 V or less and can handle a sampling frequency ranging from 8 Sps to 8 kSps with a new clocking technique.
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