A Fast Switching Low Phase Noise CMOS Frequency Synthesizer with a New Coarse Tuning Method for PHS Applications

Kang-Yoon LEE
Hyunchul KU
Young Beom KIM

Publication
IEICE TRANSACTIONS on Electronics   Vol.E89-C    No.3    pp.420-428
Publication Date: 2006/03/01
Online ISSN: 1745-1353
DOI: 10.1093/ietele/e89-c.3.420
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Integrated Electronics
Keyword: 
frequency synthesizer,  PHS,  CMOS,  lock-time,  phase noise,  coarse tuning,  current mismatch,  

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Summary: 
This paper presents a fast switching CMOS frequency synthesizer with a new coarse tuning method for PHS applications. To achieve the fast lock-time and the low phase noise performance, an efficient bandwidth control scheme is proposed. To change the bandwidth, the charge pump current and the loop filter zero resistor should be changed. Charge pump up/down current mismatches are compensated with the current mismatch compensation block. The proposed coarse tuning method selects the optimal tuning capacitances of the LC-VCO to optimize the phase noise and the lock-time. The measured lock-time is about 20 µs and the phase noise is -121 dBc/ at 600 kHz offset. This chip is fabricated with 0.25 µm CMOS technology, and the die area is 0.7 mm2.1mm. The power consumption is 54 mW at 2.7 V supply voltage.