2008 Volume E91.C Issue 6 Pages 956-962
This paper proposes a wide-locking range divide-by-3 frequency divider employing 3D helical inductors fabricated in the 0.18-μm 1P6M CMOS technology. The divider consists of an nMOS cross-coupled LC oscillator and two injection MOSFETs in series with the cross-coupled NMOSFETs, and the LC resonator is composed of two 3D helical inductors and varactors. The aim of using 3D inductor is to reduce chip size. At the supply voltage of 1.2V, the divider free-running frequency is tunable from 2.1GHz to 2.6GHz, and at the incident power of 0dBm the locking range is about 2.11GHz (29.16%), from the incident frequency 5.99GHz to 8.1GHz. The core power consumption is 4.56mW. The die area is 0.664×0.831mm2.
