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Compact Numerical Function Generators Based on Quadratic Approximation: Architecture and Synthesis Method Shinobu NAGAYAMA Tsutomu SASAO Jon T. BUTLER Publication IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Vol.E89-A No.12 pp.3510-3518 Publication Date: 2006/12/01 Online ISSN: 1745-1337 DOI: 10.1093/ietfec/e89-a.12.3510 Print ISSN: 0916-8508 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Circuit Synthesis Keyword: LUT cascades, 2nd-order Chebyshev approximation, non-uniform segmentation, NFGs, automatic synthesis, FPGA, Full Text: PDF(308KB)>>
Summary: This paper presents an architecture and a synthesis method for compact numerical function generators (NFGs) for trigonometric, logarithmic, square root, reciprocal, and combinations of these functions. Our NFG partitions a given domain of the function into non-uniform segments using an LUT cascade, and approximates the given function by a quadratic polynomial for each segment. Thus, we can implement fast and compact NFGs for a wide range of functions. Experimental results show that: 1) our NFGs require, on average, only 4% of the memory needed by NFGs based on the linear approximation with non-uniform segmentation; 2) our NFG for 2x-1 requires only 22% of the memory needed by the NFG based on a 5th-order approximation with uniform segmentation; and 3) our NFGs achieve about 70% of the throughput of the existing table-based NFGs using only a few percent of the memory. Thus, our NFGs can be implemented with more compact FPGAs than needed for the existing NFGs. Our automatic synthesis system generates such compact NFGs quickly. | ||||||||||
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