Summary
|
For Full-Text PDF, please login, if you are a member of IEICE, or go to Pay Per View on menu list, if you are a nonmember of IEICE. |
|
New Current-Mirror Sense Amplifier Design for High-Speed SRAM Applications Chun-Lung HSU Mean-Hom HO Chin-Feng LIN Publication IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Vol.E89-A No.2 pp.377-384 Publication Date: 2006/02/01 Online ISSN: 1745-1337 DOI: 10.1093/ietfec/e89-a.2.377 Print ISSN: 0916-8508 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: current-mirror sense amplifier, high-speed, low-voltage, SRAM, Full Text: PDF(1.5MB)>>
Summary: This study presents a new current-mirror sense amplifier (CMSA) design for high-speed static random access memory (SRAM) applications. The proposed CMSA can directly sense the current of memory cell and only needs two transistor stages cascaded from VDD to GND for achieving the low-voltage operation. Moreover, the sensing speed of the proposed CMSA is independent of the bit-line capacitances and is only slightly sensitive to the data-line capacitances. Based on the simulation with using the TSMC 0.25-µm 2P4M CMOS process parameter, the proposed CMSA can effectively work at 500 MHz-1 GHz with working voltage as low as 1.5 V. Simulated results show that the proposed CMSA has a much speed improvement compared with the conventional sense amplifiers. Also, the effectiveness of the proposed CMSA is demonstrated with a read-cycle-only memory system to show the good performance for SRAM applications. | ||||||||||
| ||||||||||
