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Complex M-Spotty Byte Error Control Codes Kazuyoshi SUZUKI Toshihiko KASHIYAMA Eiji FUJIWARA Publication IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Vol.E89-A No.9 pp.2396-2404 Publication Date: 2006/09/01 Online ISSN: 1745-1337 DOI: 10.1093/ietfec/e89-a.9.2396 Print ISSN: 0916-8508 Type of Manuscript: PAPER Category: Coding Theory Keyword: spotty byte error, t/b-error, spotty byte error control codes, St/bEC-(St/b+St′/b)ED codes, (St/b+St′/b)EC codes, Full Text: PDF(1016.9KB)>>
Summary: Spotty byte error control codes are very effective for correcting/detecting errors in semiconductor memory systems using recent high-density RAM chips with wide I/O data, e.g., 8, 16, or 32 bits. A spotty byte error is defined as t-bit errors within a byte of length b-bit, where 1 ≤ t ≤ b, and denoted as t/b-error. This paper proposes a new error model of two spotty byte errors occurring simultaneously, i.e., t/b-error and t′/b-error, where t  t′, called complex spotty byte errors. This paper presents two complex m-spotty byte error control codes, i.e., St/bEC-(St/b+St′/b)ED codes which correct all single t/b-errors and detect both t/b-errors and t′/b-errors simultaneously, and (St/b+St′/b)EC codes which correct both single t/b-errors and single t′/b-errors simultaneously. This paper also presents practical examples of the codes with parameter t′=1, that is, St/bEC-(St/b+S)ED codes and (St/b+S) EC codes which require smaller check-bit length than the existing Single t/b-error Correcting and Double t/b-error Detecting (St/bEC-Dt/bED) codes and the Double t/b-error Correcting (Dt/bEC) codes, respectively. | ||||||||||
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