Summary
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Long-Point FFT Processing Based on Twiddle Factor Table Reduction Ji-Hoon KIM In-Cheol PARK Publication IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Vol.E90-A No.11 pp.2526-2532 Publication Date: 2007/11/01 Online ISSN: 1745-1337 DOI: 10.1093/ietfec/e90-a.11.2526 Print ISSN: 0916-8508 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: discrete Fourier transform (DFT), fast Fourier transform (FFT), low-power design, orthogonal frequency division multiplexing (OFDM), pipelined processing, Full Text: PDF(354KB)>>
Summary: In this paper, we present a new fast Fourier transform (FFT) algorithm to reduce the table size of twiddle factors required in pipelined FFT processing. The table size is large enough to occupy significant area and power consumption in long-point FFT processing. The proposed algorithm can reduce the table size to half, compared to the radix-22 algorithm, while retaining the simple structure. To verify the proposed algorithm, a 2048-point pipelined FFT processor is designed using a 0.18 µm CMOS process. By combining the proposed algorithm and the radix-22 algorithm, the table size is reduced to 34% and 51% compared to the radix-2 and radix-22 algorithms, respectively. The FFT processor occupies 1.28 mm2 and achieves a signal-to-quantization-noise ratio (SQNR) of more than 50 dB. | ||||||||||
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