IEICE Trans - Low Power Small Area Modified Booth Multiplier Design for Predetermined Coefficients

Low Power Small Area Modified Booth Multiplier Design for Predetermined Coefficients

Yong-Eun KIM
Kyung-Ju CHO
Jin-Gyun CHUNG

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Vol.E90-A No.3 pp.694-697
Publication Date: 2007/03/01
Online ISSN: 1745-1337
DOI: 10.1093/ietfec/e90-a.3.694
Print ISSN: 0916-8508
Type of Manuscript: LETTER
Category: VLSI Design Technology and CAD
Keyword:
digital arithmetic, modified Booth multiplier, predetermined coefficients,

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Summary:
In this paper, based on the variation of the modified Booth encoding method, an efficient modified Booth multiplier design method for predetermined coefficient groups is proposed. In the case of pulse-shaping filter design used in CDMA, it is shown that by the proposed method, area and power consumption can be reduced up to 44% and 48%, respectively, compared with the conventional designs. Also, it is shown that in the case of 128-point radix-2⁴ FFT, the area and power consumption can be reduced by 18% and 36%, respectively.

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