Design of a Mutated Adder and Its Optimization Using ILP Formulation

Jeong-Gun LEE
Jeong-A LEE
Suk-Jin KIM
Kiseon KIM

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E88-D    No.7    pp.1506-1508
Publication Date: 2005/07/01
Online ISSN: 
DOI: 10.1093/ietisy/e88-d.7.1506
Print ISSN: 0916-8532
Type of Manuscript: Special Section LETTER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Digital Circuits and Computer Arithmetic
Keyword: 
mutated adder,  mixture of carry propagation schemes,  ILP-based optimization,  

Full Text: PDF(334.7KB)>>
Buy this Article



Summary: 
A mutated adder architecture utilizing a mixture of carry propagation schemes is proposed to design a delay-area efficient adder which were not available in an ordinary design space. Further, we develop an optimization method based on integer linear programming to search the expanded design space of the mutated adder.


open access publishing via