A Low-Cost Recovery Mechanism for Processors with Large Instruction Windows

In Pyo HONG
Byung In MOON
Yong Surk LEE

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E89-D    No.6    pp.1967-1970
Publication Date: 2006/06/01
Online ISSN: 1745-1361
DOI: 10.1093/ietisy/e89-d.6.1967
Print ISSN: 0916-8532
Type of Manuscript: LETTER
Category: VLSI Systems
Keyword: 
register renaming,  recovery,  checkpointing,  

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Summary: 
The latest processors employ a large instruction window and longer pipelines to achieve higher performance. Although current branch predictors show high accuracy, the misprediction penalty is getting larger in proportion to the number of pipeline stages and pipeline width. This negative effect also happens in case of exceptions or interrupts. Therefore, it is important to recover processor state quickly and restart processing immediately. In this letter, we propose a low-cost recovery mechanism for processors with large instruction windows.

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