Summary
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Compiler for Architecture with Dynamic Reconfigurable Processing Unit by Use of Automatic Assignment Method of Sub-Programs Based on Their Quantitative Evaluation Takefumi MIYOSHI Nobuhiko SUGINO Publication IEICE TRANSACTIONS on Information and Systems Vol.E90-D No.12 pp.1967-1976 Publication Date: 2007/12/01 Online ISSN: 1745-1361 DOI: 10.1093/ietisy/e90-d.12.1967 Print ISSN: 0916-8532 Type of Manuscript: Special Section PAPER (Special Section on Reconfigurable Systems) Category: Reconfigurable Device and Design Tools Keyword: dynamic reconfigurable processor, compiler, automatic context generation, Full Text: PDF(698.6KB)>>
Summary: For a coarse grain dynamic reconfigurable processing unit cooperating with a general purpose processor, a context selection method, which can reduce total execution cycles of a given program, is proposed. The method evaluates context candidates from a given program, in terms of reduction in cycles by exploiting parallel and pipeline execution of the reconfigurable processor. According to this evaluation measure, the method selects appropriate contexts for the dynamic reconfigurable processing unit. The proposed method is implemented on the framework of COINS project. For several example programs, the generated codes are evaluated by a software simulator in terms of execution cycles, and these results prove the effectiveness of the proposed method. | ||||||||||
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