A novel successive-approximation analog-to-digital (A/D) converter is described. It combines a string of equal-valued polysilicon resistors and a set of ratioed capacitors in a unique circuit configuration so that high sampling rate is achieved. The comparator is realized by a chopper-stabilized amplifier to reduce the effect of the offset voltages of MOS amplifiers. The converter performs an 8-b monotonic conversion with a differential nonlinearity less than 1 LSB in 0.77 mu s. The die area is 3750 mil/sup 2/. This conversion technique can also be utilized in a pipelined A/D converter and enables it to achieve high speed.<>