Abstract:
A video codec LSI for high-definition television (HDTV) systems has been developed. By using a time-compressed integration encoding technique, it converts a 20.0-MHz band...Show MoreMetadata
Abstract:
A video codec LSI for high-definition television (HDTV) systems has been developed. By using a time-compressed integration encoding technique, it converts a 20.0-MHz bandwidth luminance signal and two 5.0-MHz chrominance signals into a compressed image signal at 48.6-MHz sampling frequency. It is useful in many HDTV application systems, such as 400-Mb/s digital transmission system, a video disk player system, or an analog transmission system. Over 288000 elements, including a 52-kb one-transistor DRAM (dynamic random access memory) line memory specially developed for this LSI, were integrated on a 12.16*12.10-mm/sup 2/ chip. A standard cell layout method and a 1.2- mu m CMOS logic LSI process were used.<>
Published in: IEEE Journal of Solid-State Circuits ( Volume: 24, Issue: 6, December 1989)
DOI: 10.1109/4.45002