Abstract:
A CMOS power amplifier with a class AB rail-to-rail output stage is presented. By using a three-stage amplifier with double Miller compensation, the harmonic distortion o...Show MoreMetadata
Abstract:
A CMOS power amplifier with a class AB rail-to-rail output stage is presented. By using a three-stage amplifier with double Miller compensation, the harmonic distortion of the output stage is suppressed by the internal feedback loops. This approach is thoroughly investigated, and it is shown that a three-stage amplifier has apparent advantages for DC gain, harmonic distortion, and power-supply rejection ratio (PSRR). A realized prototype for ISDN applications with a gain bandwidth (GBW) of 5 MHz and with -80-dB THD at 10 kHz for an output current of 20 mA in a load of 81 Omega is presented.<>
Published in: IEEE Journal of Solid-State Circuits ( Volume: 25, Issue: 1, February 1990)
DOI: 10.1109/4.50313