Abstract:
A monolithic 20-b analog-to-digital (A/D) converter using oversampling techniques which is implemented in standard 3- mu m CMOS technology is described. The integrated ci...Show MoreMetadata
Abstract:
A monolithic 20-b analog-to-digital (A/D) converter using oversampling techniques which is implemented in standard 3- mu m CMOS technology is described. The integrated circuit contains a fourth-order delta-sigma modulator and a digital finite-impulse-response filter and decimator. The modulator consists of a continuous-time chopper-stabilized front end, and a switched-capacitor loop filter and comparator. The dynamic range is 123 dB over a DC-to-500-Hz bandwidth, and the signal-to-noise-harmonic-distortion ratio is 126 dB. The chip consumes 125 mW power and has an area of 29.25 mm/sup 2/.<>
Published in: IEEE Journal of Solid-State Circuits ( Volume: 25, Issue: 6, December 1990)
DOI: 10.1109/4.62174