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30-Msamples/s programmable filter processor | IEEE Journals & Magazine | IEEE Xplore

30-Msamples/s programmable filter processor


Abstract:

A 30-MHz finite impulse response (FIR) programmable filter processor that has been developed using a 1.2- mu m CMOS EPROM technology with single metal is discussed. Its 3...Show More

Abstract:

A 30-MHz finite impulse response (FIR) programmable filter processor that has been developed using a 1.2- mu m CMOS EPROM technology with single metal is discussed. Its 30-MHz worst-case operating frequency meets most video filtering requirements and demonstrates the potential of nonvolatile memory technologies in embedded applications. The processor has been designed with a high level of parallelism and pipelining by using a transposed FIR structure. In this approach, the multipliers are implemented with an EPROM-based look-up table containing the results of the products between video samples and filter coefficients, according to the user's application. The chap can implement every kind of FIR filter with a maximum complexity of 59 taps in a half-band filter configuration, 32 taps for a symmetric filter, and 167 taps for an asymmetric one. The equivalent coefficient precision is 12 b, assuming 8 b of input data precision. Multiprocessor configurations are allowed for more demanding performances such as longer filters, input signal precision extension, two-dimensional processing, and increased throughput.<>
Published in: IEEE Journal of Solid-State Circuits ( Volume: 25, Issue: 6, December 1990)
Page(s): 1502 - 1509
Date of Publication: 31 December 1990

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