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An 83.6dB-SNDR 101.6dB-SFDR 4th-Order Noise-Shaping SAR with 2nd-Order Nonlinearity Error Shaping | IEEE Conference Publication | IEEE Xplore

An 83.6dB-SNDR 101.6dB-SFDR 4th-Order Noise-Shaping SAR with 2nd-Order Nonlinearity Error Shaping

Publisher: IEEE

Abstract:

The Noise-Shaping SAR (NS-SAR) is a promising ADC architecture for Internet-of-Everything systems owing to its high resolution and low power [1]. Nevertheless, further pr...View more

Abstract:

The Noise-Shaping SAR (NS-SAR) is a promising ADC architecture for Internet-of-Everything systems owing to its high resolution and low power [1]. Nevertheless, further precision improvement of NSSAR ADCs is limited, suffering from nonlinearity caused by capacitor mismatch and voltage-dependent top-plate parasitic capacitance (\mathrm{C}_{\text{par}}) . Data-weighted averaging (DWA) is used to address the mismatch issue [2]. However, the DWA is only applied to MSB-DACs, and the LSB-DACs mismatch still restricts SFDR. Meanwhile, the DWA could not be easily extended to the entire DAC due to its hardware complexity exponentially growing with the DAC resolution. The segmentation method employing DWA on MSB-DACs and LSB-DACs individually has the gain error issue [3]. Ref. [4–6] separate the DAC into an M-bit thermometer-coded MSB-DAC with DWA and an N-bit binary-weighted LSB-DAC with mismatch error shaping (MES). The hardware complexity of MES grows linearly with the DAC resolution. However, the low quantization noise calls for a high DAC resolution resulting in a small unit capacitor while suffering from the \mathrm{C}_{\text{par}} error. On the other hand, the mismatch error is inversely proportional to the size of the capacitor. NS is an appropriate way to shrink DAC resolution and increase the unit capacitor size under the same kT/C noise budget. However, high NS efficiency needs active amplifiers for compensation. The large-sized devices required by large gain connect on the top plate, which enlarges the \mathrm{C}_{\text{par}} and worsens the linearity. To overcome the constraints above, instead of adopting the dedicated effort to handle the nonlinearity error, this work presents a multi-stage-noise-shaping (MASH) SAR architecture that cascades two 2^{\mathrm{n}\mathrm{d}} -order quantization NS (QNS) stages to incorporate together the 4^{\mathrm{t}\mathrm{h}} -order QNS and the 2^{\text{nd}} -order nonlinearity error shaping (NES). Our protot...
Date of Conference: 05-08 November 2023
Date Added to IEEE Xplore: 18 December 2023
ISBN Information:
Publisher: IEEE
Conference Location: Haikou, China

Funding Agency:


References

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