Abstract:
An innovative hardware design is proposed to perform modular exponentiation using only Montgomery Multiplication for CRT RSA decryption. The same hardware used to perform...Show MoreMetadata
Abstract:
An innovative hardware design is proposed to perform modular exponentiation using only Montgomery Multiplication for CRT RSA decryption. The same hardware used to perform exponentiation is also used to perform conversions. The proposed algorithm is described and provided a versatile hardware implementation. When compared to the classical sequential Radix-2 MM architecture from which it was derived, the new RSA architecture shows 44% average reduction in the energy consumption. The efficient design proposed is shown through an experimental synthesis with a 90nm CMOS technology. The results are compared with the state-of-art in the RSA 1024-bit implementations using non-RNS solutions.
Date of Conference: 08-11 November 2015
Date Added to IEEE Xplore: 29 February 2016
ISBN Information:
Electronic ISSN: 1058-6393