Agricultural mechanization impacts on agricultural productivity and society development far-reaching. The emergence of VLSI (Very Large-Scale Integrated circuits) provides possibility for full intelligence and automation of agricultural products. The VLSI placement is now facing such double challenges: the integration scale and the circuit performance. From the experimental results, we find current analytical global placers on a flat integrated circuit results incur extremely long runtime, especially when the scale of netlist is increasing dramatically nowadays. At the same time, they cannot confirm placement quality; several cells with same shape and logical connections are inseparable. In this paper, we propose a fast nonlinear placement algorithm to solve above phenomenon. The placer runtime explicitly decreases by 73% and the quality improves by 20%. And the half-perimeter wirelength of the placer after detailed placement outperforms current state-of-the-art placers Capo, FastPlace, Fengshui and mPL5-fast by 9%, 7%, 7%, and 5% respectively.