Abstract:
Design, development and simulation results of an interdigitated metal-fingers capacitors in 0.18μm RF-CMOS technology that are exploiting both lateral and vertical metal-...Show MoreMetadata
Abstract:
Design, development and simulation results of an interdigitated metal-fingers capacitors in 0.18μm RF-CMOS technology that are exploiting both lateral and vertical metal-metal capacitances are presented. Two RF-CMOS capacitors are designed specifically for applications in a 2.45GHz power splitter circuit. Five metal RF-CMOS layers are used to design two capacitors of 1.39pF and 2.2pF, consisting of 101 and 105 metal fingers respectively. The real impedance obtained at the input is Z1 = 35.04Ω and Z2 = 39.73Ω, while the insertion loss is S21 = 2.47dB. Return loss S11 and S22 are simulated as 4.042dB and 4.047dB respectively. Phase measurements of 110.9° and 101.2° are obtained for the input and output ports, indicating that the phase shift is not degraded too much due to the capacitor.
Date of Conference: 06-09 December 2010
Date Added to IEEE Xplore: 27 May 2011
ISBN Information: