Abstract:
A 12-bit Digital-analog converter (DAC) with pseudo Fibonacci sequence was fabricated in a 0.18μm CMOS technology. Proposed 12-bit DAC is composed of a 6-bit pseudo Fibon...Show MoreMetadata
Abstract:
A 12-bit Digital-analog converter (DAC) with pseudo Fibonacci sequence was fabricated in a 0.18μm CMOS technology. Proposed 12-bit DAC is composed of a 6-bit pseudo Fibonacci sequence and 6bit unary sequence. The power consumption of the proposed DAC is expected lower than that of conventional binary and unary DAC. The simulated power consumption of proposed 12-bit DAC is 40mV at 3.3V supply voltage. Also we fabricated the prototype 6-bit DAC with pseudo Fibonacci sequence and tested. The measured power consumption is very low and almost the same value as a simulated value.
Date of Conference: 06-09 December 2010
Date Added to IEEE Xplore: 27 May 2011
ISBN Information: