Test access mechaism for stack test time reduction of 3-dimensional integrated circuit | IEEE Conference Publication | IEEE Xplore

Test access mechaism for stack test time reduction of 3-dimensional integrated circuit


Abstract:

In this paper, the reconfigurable test access mechanism (RTAM) is designed based on the emerging test standard to reduce the cumulative stack test time of the 3-dimension...Show More

Abstract:

In this paper, the reconfigurable test access mechanism (RTAM) is designed based on the emerging test standard to reduce the cumulative stack test time of the 3-dimensional integrated circuit (3-D IC). The RTAM enables the test scheduling to reflect the variation of the test constraints in the overall stack test phases. Simulation results show the RTAM achieves the cumulative stack test time reduction compared with a non-reconfigurable TAM for the stacked dies in the 3-D IC.
Date of Conference: 25-28 October 2016
Date Added to IEEE Xplore: 05 January 2017
ISBN Information:
Conference Location: Jeju, Korea (South)

References

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