Abstract:
We introduce some basic principles for extending the classical systolic synthesis methodology to multidimensional time. Multidimensional scheduling enables complex algori...Show MoreMetadata
Abstract:
We introduce some basic principles for extending the classical systolic synthesis methodology to multidimensional time. Multidimensional scheduling enables complex algorithms that do not admit linear schedules to be parallelized, but it also requires the use of memories in the architecture. We explain how to obtain compatible allocation and memory functions for VLSI (or SIMD-like code) generation. We also present an original mechanism for controlling a VLSI architecture that has a multidimensional schedule. A structural VHDL code has been derived and synthesized (for implementation on FPGA platforms) using these systematic design principles. These results are preliminary steps to the hardware synthesis for multidimensional time.
Published in: Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors. ASAP 2003
Date of Conference: 24-26 June 2003
Date Added to IEEE Xplore: 15 July 2003
Print ISBN:0-7695-1992-X
Print ISSN: 2160-0511