Abstract:
Summary form only given. As we move to higher levels of integration, it is clear that power and energy efficiency are the most formidable barriers. A chip built out of 10...Show MoreMetadata
Abstract:
Summary form only given. As we move to higher levels of integration, it is clear that power and energy efficiency are the most formidable barriers. A chip built out of 1000 cores requires fundamentally rethinking the whole compute stack from the ground up for energy efficiency. Often, energy efficiency is in direct conflict with resilience. In this talk, I will describe some of the architecture technologies that we are exploring, based on low voltage operation and streamlined architectures.
Published in: 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors
Date of Conference: 05-07 June 2013
Date Added to IEEE Xplore: 25 July 2013
ISBN Information: