Abstract:
Physical Unclonable Function (PUF) is a promising hardware security primitive. However, it is severely threatened by modeling attacks. This paper proposes a novel Polymor...Show MoreMetadata
Abstract:
Physical Unclonable Function (PUF) is a promising hardware security primitive. However, it is severely threatened by modeling attacks. This paper proposes a novel Polymorphic PUF for CPU+FPGA SoC. We fully exploit the dynamic reconfigurability of the SoC and use the partial reconfiguration bitstream as the challenge to minimize the Challenge Response Pair (CRP) correlation so as to resist modeling attacks. An asymmetric RO pair is proposed to produce the response. Experiments on real CPU+FPGA SoCs show the high resistance of Polymorphic PUF against modeling attacks, with good uniformity and uniqueness.
Date of Conference: 19-20 October 2017
Date Added to IEEE Xplore: 07 May 2018
ISBN Information: