A novel vertical semi-floating gate transistor for high-density ultrafast memory | IEEE Conference Publication | IEEE Xplore

A novel vertical semi-floating gate transistor for high-density ultrafast memory


Abstract:

A novel vertical device structure based on semi-floating gate concept is reported and simulated by Sentaurus technology computer aided design (TCAD) in this paper. This d...Show More

Abstract:

A novel vertical device structure based on semi-floating gate concept is reported and simulated by Sentaurus technology computer aided design (TCAD) in this paper. This device can have the memory function with high density and speed. The device area can be reduced to be 4 F2 (F is the feature size) and the operating speed of the novel device can be better than that of dynamic random access memory (DRAM).
Date of Conference: 25-28 October 2017
Date Added to IEEE Xplore: 11 January 2018
ISBN Information:
Conference Location: Guiyang, China

Contact IEEE to Subscribe

References

References is not available for this document.