A low-dropout regulator (LDO) with a wide-bandwidth feedforward supply noise rejection technique to maximize power supply rejection (PSR) at middle-to-high frequency is presented in this paper. The concept is based on a bandpass filter design without using a large voltage-gain amplifier in the feedforward path. For the PSR filter design, the total on-chip capacitance is about 36pF by utilizing an nwell gate capacitor with high capacity in the process. This circuit has been analyzed and verified in a 0.5μm CMOS process. From the experimental results, the proposed LDO can operate with a dropout voltage of 150mV at maximum load of 25mA. The quiescent current is only 19μA at light load. It achieves a PSR better than −45dB up to 10MHz with a 4μF output capacitor.