Differential power analysis is an effective way to crack the key of the cryptographic chip. The attacker can analyze the key by monitoring the power curve during the execution of their internal programs, which poses a serious threat to the security of the cryptographic device. In order to improve the capability of anti-power analysis of the cryptographic chip, a novel configurable current flattening circuit (CCFC) based on power balance principle is proposed. The circuit is independent of the cryptographic algorithm and does not affect the original design flow of the cryptographic chip. In this paper, the circuit is designed under the SMIC 65nm CMOS technology. The test results show that the circuit can work effectively over a wide frequency range, the flattened current value can be adjusted from 0 to 32mA, and the attenuation of current variations on the power supply can reach 96.2%.