Abstract:
Multiple patterning lithography has been widely adopted in advanced technology nodes of VLSI manufacturing. As a key step in the design flow, multiple patterning layout d...Show MoreMetadata
Abstract:
Multiple patterning lithography has been widely adopted in advanced technology nodes of VLSI manufacturing. As a key step in the design flow, multiple patterning layout decomposition (MPLD) is critical to design closure. Due to the NP-hardness of the general decomposition problem, various efficient algorithms have been proposed with high quality solutions. However, with increasingly complicated design flow and peripheral processing steps, developing a high-quality layout decomposer becomes more and more difficult, slowing down the further advancement in this field. This paper presents OpenMPL [1], an open-source layout decomposition framework, with well-separated peripheral processing and the core solving steps. We demonstrate the flexibility of the framework with efficient implementations of various state-of-the-art algorithms, which enable us to reproduce most of the recent results on widely-recognized benchmarks. We believe OpenMPL can pave the road for developing layout decomposition engines and stimulate further researches on this problem.
Published in: 2019 IEEE 13th International Conference on ASIC (ASICON)
Date of Conference: 29 October 2019 - 01 November 2019
Date Added to IEEE Xplore: 06 February 2020
ISBN Information: