Abstract:
This work presents a compact ADC architecture capable of digitizing the signals received by every individual element of a 2D ultrasound transducer array. An element-match...Show MoreMetadata
Abstract:
This work presents a compact ADC architecture capable of digitizing the signals received by every individual element of a 2D ultrasound transducer array. An element-matched layout of 150 μm × 150 μm is realized by exploiting each piezo-electric transducer element not only as the signal source, but also as the electro-mechanical loop-filter of a continuoustime band-pass ΔΣ ADC, thus minimizing the required circuit blocks. The transducer's frequency response, which is inherently matched with the signal bandwidth of interest, provides noise shaping to the ADC. A prototype chip has been fabricated in a 0.18 μm CMOS technology, featuring 20 ADCs located directly underneath a 150 μm-pitch piezo-electric transducer array fabricated on top of the chip. Each ADC, clocked at 200 MHz, consumes 800 μψ from a 1.8 V supply, and achieves an SNR of 47 dB in a 75% bandwidth around a center frequency of 5 MHz. Acoustic measurements show that the ADC successfully digitizes incoming echo signals.
Published in: 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)
Date of Conference: 06-08 November 2017
Date Added to IEEE Xplore: 28 December 2017
ISBN Information: