Abstract:
We propose an on-chip bias temperature instabilities (BTI) monitor by using standard cell based unbalanced ring-oscillator (RO). The monitor consists of NAND and NOR with...Show MoreMetadata
Abstract:
We propose an on-chip bias temperature instabilities (BTI) monitor by using standard cell based unbalanced ring-oscillator (RO). The monitor consists of NAND and NOR with extremely large difference in drive strength, which enables 4.2x sensitivity to BTI compared with normal INV based RO. This originates not only from accentuation of the degraded stage with small drive strength by the dominant delay but also from ΔVth sensitivity improvement of stacked transistors with increasing output transition time. In addition, our proposal allows to monitor either one of negative BTI (NBTI) or positive BTI (PBTI) selectively by making use of the Miller effect caused by the size combination of NOR and NAND. A test chip is implemented in a 28 nm High-k Metal-Gate (HKMG) CMOS technology. We successfully observed that measured results of each RO were well matched with simulations. Owing to this high sensitivity and successful NBTI/PBTI separation, we can detect variations and outliers of BTI at time of testing, and optimize guard band (GB) while considering NBTI/PBTI sensitivity difference of each circuit.
Published in: 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)
Date of Conference: 06-08 November 2017
Date Added to IEEE Xplore: 28 December 2017
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