Abstract:
In this article, we present the modelling, design and characterization of a 3-Vppd linear-output-swing 90-GBd PAM-4 modulator driver, realised in III-V Lab's in-house 0.5...Show MoreMetadata
Abstract:
In this article, we present the modelling, design and characterization of a 3-Vppd linear-output-swing 90-GBd PAM-4 modulator driver, realised in III-V Lab's in-house 0.5-μm InP DHBT technology (380/520-GHz {f_{T}/f_{{\max}}}, 4.2-V {BV_{\text{CE0}}}). The driver exhibits 13-dB equalisation capabilities at 95 GHz with a bandwidth well beyond 110 GHz. It features a 0.67-W power consumption, resulting in a 1.5-GBd FoM with good output signal quality. To the best of our knowledge this linear driver shows the highest >64 GBd PAM-4 performance in current state-of-the-art, without DSP nor pre-emphasis. We also report on a newly developed 0.5-μm InP DHBT technology and its modelling using small-value external parasitic EM-simulation extraction, showing improved high-frequency prediction accuracy at circuit level.
Published in: 2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)
Date of Conference: 05-08 December 2021
Date Added to IEEE Xplore: 25 January 2022
ISBN Information: