To improve the speed of helical CT based on Katsevich Algorithm, a high speed Hilbert transformation module which limiting the speed of the whole CT system is designed. In this paper the structure of 3 level pipe-line PE and 12 level discrete Hilbert transformation module are proposed. A 16 points discrete Hilbert transformation module is achieved by FPGA chip with parallel systolic array method and the speed is 104.94MHz which is much better than the original FFT methods, serial systolic array method and traditional parallel systolic array method.