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A reconfigurable computing architecture for semantic information filtering | IEEE Conference Publication | IEEE Xplore

A reconfigurable computing architecture for semantic information filtering


Abstract:

The increasing amount of information accessible to a user digitally makes information retrieval & filtering difficult, time consuming and ineffective. New meaning represe...Show More

Abstract:

The increasing amount of information accessible to a user digitally makes information retrieval & filtering difficult, time consuming and ineffective. New meaning representation techniques proposed in literature help to improve accuracy but increase problem size exponentially. In this paper, we present a novel reconfigurable computing architecture that addresses this issue, outperforms contemporary many-core processors such as Intel's Single Chip Cloud computer and Nvidia's GPU's by ~20x for semantic information filtering. We validate our design using industry standard System-on-chip virtual prototyping and synthesis tools. Such a high performance reconfigurable architecture can form a template for a wide range of content-based and collaborative filtering engines used for big-data analytics.
Date of Conference: 06-09 October 2013
Date Added to IEEE Xplore: 23 December 2013
Electronic ISBN:978-1-4799-1293-3
Conference Location: Silicon Valley, CA, USA

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