With IC technology scaling into nanometer regime, VLSI chips not only become much more complex but also suffer from visible process variations. As a result, statistical methods are replacing deterministic methods for power/ground (P/G) grid analysis and efficient local analysis methods are badly needed to cut down the analysis complexity. A novel single-node successive over relaxation (SN-SOR) analytical method is proposed to efficiently solve correlated resistor vectors and then directly compute voltage variations for question nodes of large IR drop. Compared with traditional global SOR methods, SN-SOR method shows visible advantages including locality, efficiency, and low memory complexity. Experiments show our method is average 30 times faster than the global SOR method with only 0.38% accuracy loss.