High gain, low power, CMOS current reused LNA with noise optimization | IEEE Conference Publication | IEEE Xplore

High gain, low power, CMOS current reused LNA with noise optimization


Abstract:

A low power, high gain, optimized CMOS low noise amplifier (LNA) is presented in this paper intended for Bluetooth applications. Employing CMOS Inverter as a core of the ...Show More

Abstract:

A low power, high gain, optimized CMOS low noise amplifier (LNA) is presented in this paper intended for Bluetooth applications. Employing CMOS Inverter as a core of the proposed LNA, the extra voltage gain within the lowpower consumption is obtained. By improving the previous works on CMOS LNA optimization, we attain a comprehensive and compatible method to optimize the fundamental features of the CMOS Inverter Current Reused (CICR) family. The provided CICR LNA results inclusively prove the advantages of our design over other published topologies. The designed LNA based on 0.13μm CMOS technology demonstrates a 28.5dB voltage gain (S21), 2.4dB noise figure (NF), -18dB impedance matching (S11), and dissipating power less than 1mW at 2.4GHz frequency.
Date of Conference: 05-08 May 2013
Date Added to IEEE Xplore: 25 July 2013
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Conference Location: Regina, SK, Canada

References

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