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A self-indexed register file for efficient arithmetical computing hardware | IEEE Conference Publication | IEEE Xplore

A self-indexed register file for efficient arithmetical computing hardware


Abstract:

This paper presents a novel register file with self-indexed features, targeting the DSP/media algorithm with massive data locality. The self-indexed register file (SIRF) ...Show More

Abstract:

This paper presents a novel register file with self-indexed features, targeting the DSP/media algorithm with massive data locality. The self-indexed register file (SIRF) contains 128 high-speed registers, 4 input ports and 4 output ports. It can be accessed with the double circular window mode, or simply with the immediate index mode. SIRF can eliminate write after write (WAW) dependence without register renaming in hardware or redundant register allocation in compilers, and it can also reduce the address computation if the accessing pattern satisfies the circular window mode. The SIRF was implemented in a high performance mathematical processor(MaPU). Two detailed application examples, finite impulse response (FIR) filtering and image interpolating, are demonstrated to show how SIRF can accelerate DSP/media algorithms. Evaluation shows that SIRF can dramatically reduce memory access. A 2.88× speed-up and a 20% overall power reduction are observed with the evaluated algorithms.
Date of Conference: 27-29 September 2017
Date Added to IEEE Xplore: 09 November 2017
ISBN Information:
Conference Location: Colchester, UK

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