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A new reduced clock-swing flip-flop: NAND-type keeper flip-flop (NDKFF) | IEEE Conference Publication | IEEE Xplore

A new reduced clock-swing flip-flop: NAND-type keeper flip-flop (NDKFF)


Abstract:

A new reduced clock-swing flip-flop, named NAND-type Keeper Flip-Flop (NDKFF) is proposed. Compared with other conventional reduced clock-swing flip-flops such as HSFF an...Show More

Abstract:

A new reduced clock-swing flip-flop, named NAND-type Keeper Flip-Flop (NDKFF) is proposed. Compared with other conventional reduced clock-swing flip-flops such as HSFF and RCSFF, NDKFF features a simple configuration, which does not have additional clock drivers or does not have additional nand/or p-wells. Compared with the hybrid-latch flip-flop, 52% of the flip-flop power and 64% of the clocking power are saved in the case of 0.25 /spl mu/m CMOS technology. Moreover CLK-to-Q delay is comparable to that of conventional C2MOS-type master-slave flip-flop.
Date of Conference: 15-15 May 2002
Date Added to IEEE Xplore: 07 August 2002
Print ISBN:0-7803-7250-6
Conference Location: Orlando, FL, USA

References

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