Abstract:
Application-specific standard products (ASSPs) have been so far customized by an increasing amount of embedded software or very recently by electrically and mask-programm...Show MoreMetadata
Abstract:
Application-specific standard products (ASSPs) have been so far customized by an increasing amount of embedded software or very recently by electrically and mask-programmable embedded gate-arrays. The solution proposed in this paper addresses both the large demand for higher flexibility and the need for fast product turn-around time. This is achieved by using single-via programmable logic and consistent hardware and software co-design flow. The system architecture is discussed as well as the design flows for pre- and post-silicon design and customization. The silicon area required by the system is 23 mm/sup 2/ in a 0.13 /spl mu/m CMOS technology. The embedded via-programmable logic accounts for about 30% of the system area.
Published in: Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)
Date of Conference: 06-06 October 2004
Date Added to IEEE Xplore: 22 November 2004
Print ISBN:0-7803-8495-4