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Future Microprocessor Interfaces: Analysis, Design and Optimization | IEEE Conference Publication | IEEE Xplore

Future Microprocessor Interfaces: Analysis, Design and Optimization


Abstract:

High-aggregate bandwidth interfaces with minimized power, silicon area, cost and complexity will be essential to the viability of future microprocessor systems. Optimizat...Show More

Abstract:

High-aggregate bandwidth interfaces with minimized power, silicon area, cost and complexity will be essential to the viability of future microprocessor systems. Optimization of microprocessor interfaces at the system level is crucial to providing the most cost-effective and efficient solution. This paper details a comprehensive interconnect and system level analysis method that can be used to accurately evaluate platform-level tradeoffs and has been correlated to link measurements with 10% accuracy. System tradeoffs with respect to interconnect quality, equalization, modulation, clock architecture are shown. Interconnect and circuit density improvements are identified as a promising research direction to maximize the bandwidth and power efficiency of future microprocessor platforms.
Date of Conference: 16-19 September 2007
Date Added to IEEE Xplore: 21 January 2008
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Conference Location: San Jose, CA, USA

References

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