Abstract:
A 5-b flash ADC with a closed-loop THA is implemented in 0.18-mum SiGe BiCMOS. A global shunt feedback THA and a current-weighted comparator allow the ADC to achieve wide...Show MoreMetadata
Abstract:
A 5-b flash ADC with a closed-loop THA is implemented in 0.18-mum SiGe BiCMOS. A global shunt feedback THA and a current-weighted comparator allow the ADC to achieve wide resolution bandwidth of 6.5 GHz and high sampling rate up to 24 GS/s. The ADC shows an SNDR of 28 dB and an SFDR of 36 dB with a 1 GHz input sampled at 16 GS/s. It consumes 3.3 W from 3.6/3-V supplies and occupies 8.68 mm2 silicon area.
Published in: 2008 IEEE Custom Integrated Circuits Conference
Date of Conference: 21-24 September 2008
Date Added to IEEE Xplore: 17 November 2008
ISBN Information: