Abstract:
A 12-bit 1.2V 160MS/s pipeline ADC for high-definition video systems is presented. The proposed multipath frequency-compensation technique enables the conventional RNMC-b...Show MoreMetadata
Abstract:
A 12-bit 1.2V 160MS/s pipeline ADC for high-definition video systems is presented. The proposed multipath frequency-compensation technique enables the conventional RNMC-based three-stage amplifier to achieve a stable operation at a sampling rate of 160MS/s. The measured differential and integral nonlinearities of the prototype ADC implemented in a 65nm CMOS process are less than 0.69LSB and 1.00LSB respectively. The ADC shows a maximum SNDR of 58.5dB and 53.1dB and a maximum SFDR of 76.0dB and 67.8dB at 160MS/s and 200MS/s, respectively. The ADC with an active die area of 0.72mm2 shows a FoM of 0.75pJ/conv-step at 160MS/s and 1.2V.
Published in: 2009 IEEE Custom Integrated Circuits Conference
Date of Conference: 13-16 September 2009
Date Added to IEEE Xplore: 09 October 2009
ISBN Information:
Contents 