Abstract:
A reconfigurable, 3-50GHz all-digital impulse generator for short-distance wireless communications is designed in 40nm-CMOS. Digital back-gate biasing is used for raised-...Show MoreMetadata
Abstract:
A reconfigurable, 3-50GHz all-digital impulse generator for short-distance wireless communications is designed in 40nm-CMOS. Digital back-gate biasing is used for raised-cosine envelope pulse-shaping to achieve better spectral-mask efficiency. Pulse duration, duty-cycle, and operating frequency are digitally programmable, in order to satisfy multi-band standards compatibility. An asymmetric inverter design within the Mono-Pulse-Generator (MPG) eliminates undesired glitches for the complementary clock edge. Occupying 350μm×260μm die area, the proposed impulse transmitter achieves a maximum data-rate of 3Gbps and an energy-efficiency of 0.5pJ/pulse for a 25GHz carrier frequency.
Published in: 2011 IEEE Custom Integrated Circuits Conference (CICC)
Date of Conference: 19-21 September 2011
Date Added to IEEE Xplore: 20 October 2011
ISBN Information: