A 63.5dB, 2MHz bandwidth ΔΣ ADC using two ICOs pseudo-differentially as an integrator/quantizer and a combined front-end switched-capacitor V-I converter and feedback DAC in 0.18μm without performance-enhancing calibration is presented. A novel high-linearity, temperature-independent, and voltage-independent ring oscillator architecture provides a high resolution quantizer output, and a digital ΔΣ loop truncates this for a 17-level feedback DAC. The custom portion of the design consumes 6.08mW of analog power from a 1.8V supply and occupies 0.152mm².