A 148ps, single-cycle 64-bit Ling adder with Constant-Delay (CD) logic implemented in the critical path is fabricated in a 65nm, 1V CMOS process. The pre-evaluation and constant delay (regardless of the logic expressions) features of CD logic makes it up to 2X faster than dynamic logic in realizing complex logic functions such as addition. At 1V supply, this adder's worst-case measured power and leakage power are 135mW and 0.22mW, respectively.