A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation | IEEE Conference Publication | IEEE Xplore

A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation

Publisher: IEEE

Abstract:

We describe the implementation and silicon measurement results from a Razor-based hardware loop-accelerator (RZLA), implementing the Sobel edge-detection algorithm. We de...View more

Abstract:

We describe the implementation and silicon measurement results from a Razor-based hardware loop-accelerator (RZLA), implementing the Sobel edge-detection algorithm. We demonstrate robust operation with a large Dynamic Voltage Scaling (DVS) range achieved using 50% of the clock-period for timing-speculation. At 1GHz operating frequency, Razor DVS enables 34% energy-efficiency improvement on a per-device basis and 33% overall on the entire batch of devices.
Date of Conference: 22-25 September 2013
Date Added to IEEE Xplore: 11 November 2013
Electronic ISBN:978-1-4673-6146-0

ISSN Information:

Publisher: IEEE
Conference Location: San Jose, CA, USA

References

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