Accurate numerical solutions of partial differential equations (PDE) require high-precision fine-grid Jacobi iterations that are demanding in both computation and memory. To reduce the precision and memory, we reformulate the multi-grid Jacobi method in a residual form to enable the mapping of a high-precision PDE solver on SRAMs that perform low-precision parallel multiply-accumulates (MAC) in memory, reducing both energy and area. To improve performance, we employ a DLL to generate well-controlled unit pulses for driving word lines and a dual-ramp single-slope ADC to convert bit line outputs. The design is prototyped in a 1.87mm² 180nm test chip made of four 320×64 MAC-SRAMs, each supporting 128× parallel 5b×5b MACs with 32 5b output ADCs and consuming 16.6mW at 200MHz. The test chip is demonstrated to reach an error tolerance of 10^-8 in solving PDEs at 56.9GOPS.