A 17.8MS/s Neural-Network Compressed Sensing Radar Processor in 16nm FinFET CMOS | IEEE Conference Publication | IEEE Xplore

A 17.8MS/s Neural-Network Compressed Sensing Radar Processor in 16nm FinFET CMOS


Abstract:

Transceiver bandwidth limits the resolution of ultra-low-power pulse radar systems. Compressed sensing techniques improve resolution but existing efforts require heavy co...Show More

Abstract:

Transceiver bandwidth limits the resolution of ultra-low-power pulse radar systems. Compressed sensing techniques improve resolution but existing efforts require heavy computation. This work proposes a neural-network based compressed sensing radar processor architecture that improves resolution by 6× while remaining computationally efficient. Fabricated in 16nm FinFET CMOS, the processor simultaneously achieves more than 8× throughput and 18× efficiency over the state-of-the-art.
Date of Conference: 22-25 March 2020
Date Added to IEEE Xplore: 23 April 2020
ISBN Information:

ISSN Information:

Conference Location: Boston, MA, USA

Contact IEEE to Subscribe

References

References is not available for this document.